The patent application relates to a method for the simultaneous manufacture of fast short-channel (type A) and voltage-stable MOS transistors (type (B) as are employed in VLSI (very large scale integration) circuits where digital and analog functions are integrated on one chip. P-doped or n-doped tubs are generated in the silicon substrate for the incorporation of the respective n-channel or p-channel transistors. The corresponding dopant atoms for setting the various transistor threshold voltages are introduced into the tubs by means of multiple ion implantation. The masking for the individual ion implantations occurs by means of photoresists and/or by means of silicon oxide or silicon nitride structures. The production of the source/drain and gate regions as well as the generation of the intermediate and insulating oxide and of the interconnect level is undertaken in accordance with known method steps of MOS technology.
Two types of MOS transistors are required for modern VLSI circuits in which digital and analog functions are integrated on one chip:
Type A: short channel transistors which should enable very high switching speeds, but need not withstand any voltages higher than the supply voltage (V.sub.DD =5 V);
Type B: analog transistors at which higher drain voltages can occur (up to V.sub.DD =12 V), but whose switching speed is not subject to such high demands.